template<uint8_t N>
class Soft::SRPI< N >
Soft N-Shift Register Parallel Input. The shift registers (74HC165) may be cascaded for N*8-bit parallel input port (see circuit below). The pins are numbered from the first connect shift register (Q0..Q7) and updwards in the chain (Q8..Q15) and so on.
Circuit
74HC165 (VCC)
+----U----+ |
(D5/PLD)---+--------1-|/PL VCC|-16-+
(D4/SCL)-+-)--------2-|CP /CE|-15-----------(GND)
(Q4)-----)-)--------3-|D4 D3|-14------------(Q3)
(Q5)-----)-)--------4-|D5 D2|-13------------(Q2)
(Q6)-----)-)--------5-|D6 D1|-12------------(Q1)
(Q7)-----)-)--------6-|D7 D0|-11------------(Q0)
| | 7-|/Q7 DS|-10-----------------+
| | +-8-|GND Q7|--9--------(SDA/D3) |
| | | +---------+ |
| | | 0.1uF |
| | (GND)-----||-------(VCC) |
| | | |
| | 74HC165 | |
| | +----U----+ | |
| +--------1-|/PL VCC|-16-+ |
+-)--------2-|CP /CE|-15-----------(GND) |
(Q12)----)-)--------3-|D4 D3|-14-----------(Q11) |
(Q13)----)-)--------4-|D5 D2|-13-----------(Q10) |
(Q14)----)-)--------5-|D6 D1|-12------------(Q9) |
(Q15)----)-)--------6-|D7 D0|-11------------(Q8) |
| | 7-|/Q7 DS|-10-----------------)--+
| | +-8-|GND Q7|--9-----------------+ |
| | | +---------+ |
| | | 0.1uF |
v v (GND)-----||-------(VCC) v
- Parameters
-
[in] | N | number of shift registers (N * 8 input pins). |
Definition at line 69 of file SRPI.hh.