47 class DS1307 :
protected TWI::Device {
64 if (!
read_ram(0, &rtc,
sizeof(rtc)))
return (
false);
107 } __attribute__((packed));
122 int count =
write_ram(addr, &control,
sizeof(control));
123 return (count ==
sizeof(control));
135 int count =
write_ram(addr, &control,
sizeof(control));
136 return (count ==
sizeof(control));
146 const static uint8_t
RAM_MAX = RAM_END - RAM_START + 1;
155 bool read_ram(uint8_t addr,
void* buf,
size_t count)
157 if (!acquire())
return (
false);
158 if (write(&addr,
sizeof(addr)) !=
sizeof(addr))
return (
false);
159 bool res = (read(buf, count) == (int) count);
160 if (!release())
return (
false);
172 bool write_ram(uint8_t addr,
const void* buf,
size_t count)
174 if (count == 0)
return (
true);
177 iovec_arg(vp, &addr,
sizeof(addr));
178 iovec_arg(vp, buf, count);
180 if (!acquire())
return (
false);
181 bool res = (write(vec) == (int) count + 1);
182 if (!release())
return (
false);
198 } __attribute__((packed));
217 operator uint8_t() {
return (as_uint8); }
223 } __attribute__((packed));
233 } __attribute__((packed));
int8_t tm_mday
Day in Month [1-31].
int8_t tm_min
Minutes [0-59].
uint8_t rs
< Bitfield access.
uint8_t out
Output Control.
bool set_time(struct tm &now)
rtc_t rtc
Clock/Calender Registers.
static const uint8_t RAM_START
static const uint8_t RAM_END
bool enable(Rate rs=RS_1_HZ)
int16_t tm_year
Years since 1900.
uint8_t as_uint8
Unsigned byte access.
static const uint8_t RAM_MAX
int8_t tm_sec
Seconds [0-60].
DS1302< BOARD::D11, BOARD::D12, BOARD::D13 > rtc
int8_t tm_hour
Hours [0-23].
int8_t tm_wday
Days since Sunday [0-6].
uint8_t sqwe
Square-Ware Enable.
Hardware::TWI twi(100000UL)
bool write_ram(uint8_t addr, const void *buf, size_t count)
bcd_t seconds
00-59 Seconds.
bool read_ram(uint8_t addr, void *buf, size_t count)
int8_t tm_mon
0-11 Months since January [0-11].
bool get_time(struct tm &now)
bcd_t minutes
00-59 Minutes.
control_t control
Control Register.