DS2482.hh

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#ifndef COSA_DS2482_HH
#define COSA_DS2482_HH

#include "Cosa/TWI.hh"

class DS2482 : private TWI::Driver {
public:
  DS2482(uint8_t subaddr = 0) : TWI::Driver(0x18 | (subaddr & 0x03)) {}

  bool device_reset();

  bool device_config(bool apu = true, bool spu = false, bool iws = false);

  enum Register {
    STATUS_REGISTER = 0xf0,
    READ_DATA_REGISTER = 0xe1,
    CHANNEL_SELECTION_REGISTER = 0xd2,
    CONFIGURATION_REGISTER = 0xc3
  } __attribute__((packed));

  int set_read_pointer(Register addr);

  bool channel_select(uint8_t chan);

  bool one_wire_reset();

  int one_wire_read_bit();

  bool one_wire_write_bit(bool value);

  bool one_wire_write_byte(uint8_t value);

  int one_wire_read_byte();

  int one_wire_triplet(bool direction = false);

protected:
  enum {
    DEVICE_RESET = 0xf0,        
    SET_READ_POINTER = 0xe1,    
    WRITE_CONGIFURATION = 0xd2, 
    CHANNEL_SELECT = 0xc3,      
    ONE_WIRE_RESET = 0xb4,      
    ONE_WIRE_SINGLE_BIT = 0x87, 
    ONE_WIRE_WRITE_BYTE = 0xa5, 
    ONE_WIRE_READ_BYTE = 0x96,  
    ONE_WIRE_TRIPLET = 0x78     
  } __attribute__((packed));

  union status_t {
    uint8_t as_uint8;           
    struct {                    
      uint8_t IWB:1;            
      uint8_t PPD:1;            
      uint8_t SD:1;             
      uint8_t LL:1;             
      uint8_t RST:1;            
      uint8_t SBR:1;            
      uint8_t TSB:1;            
      uint8_t DIR:1;            
    };
    operator uint8_t()
    {
      return (as_uint8);
    }
  };

  union config_t {
    uint8_t as_uint8;           
    struct {                    
      uint8_t APU:1;            
      uint8_t ZERO:1;           
      uint8_t SPU:1;            
      uint8_t IWS:1;            
      uint8_t COMP:4;           
    };
    operator uint8_t()
    {
      return (as_uint8);
    }
    config_t()
    {
      as_uint8 = 0;
    }
  };

  static const int POLL_MAX = 20;
};

#endif