#include <W5100.hh>
Socket Registers (chap. 3.2, pp. 16).
Definition at line 211 of file W5100.hh.
uint8_t W5100::SocketRegister::CR |
Command Register.
Definition at line 213 of file W5100.hh.
uint8_t W5100::SocketRegister::DHAR[6] |
Destination Hardware Address Register.
Definition at line 217 of file W5100.hh.
uint8_t W5100::SocketRegister::DIPR[4] |
Destination IP Address Register.
Definition at line 218 of file W5100.hh.
uint16_t W5100::SocketRegister::DPORT |
Destination Port Register.
Definition at line 219 of file W5100.hh.
uint8_t W5100::SocketRegister::IR |
uint8_t W5100::SocketRegister::MR |
Mode Register.
Definition at line 212 of file W5100.hh.
uint16_t W5100::SocketRegister::MSSR |
Maximum Segment Size Register.
Definition at line 220 of file W5100.hh.
uint16_t W5100::SocketRegister::PORT |
Source Port Register.
Definition at line 216 of file W5100.hh.
uint8_t W5100::SocketRegister::PROTO |
Protocol in IP Raw mode.
Definition at line 221 of file W5100.hh.
uint8_t W5100::SocketRegister::reserved1[9] |
uint8_t W5100::SocketRegister::reserved2[2] |
uint8_t W5100::SocketRegister::reserved3[212] |
uint16_t W5100::SocketRegister::RX_RD |
RX Read Pointer Register.
Definition at line 229 of file W5100.hh.
uint16_t W5100::SocketRegister::RX_RSR |
RX Received Size Register.
Definition at line 228 of file W5100.hh.
uint8_t W5100::SocketRegister::SR |
Status Register.
Definition at line 215 of file W5100.hh.
uint8_t W5100::SocketRegister::TOS |
uint8_t W5100::SocketRegister::TTL |
uint16_t W5100::SocketRegister::TX_FSR |
TX Free Size Register.
Definition at line 225 of file W5100.hh.
uint16_t W5100::SocketRegister::TX_RD |
TX Read Pointer Register.
Definition at line 226 of file W5100.hh.
uint16_t W5100::SocketRegister::TX_WR |
TX Write Pointer Register.
Definition at line 227 of file W5100.hh.
The documentation for this struct was generated from the following file: