#include <SRPO.hh>

Inheritance diagram for SRPO< N >:

Collaboration diagram for SRPO< N >:

Classes
class	OutputPin

Public Member Functions
	SRPO (Board::DigitalPin cs=Board::D10, SPI::Clock rate=SPI::DEFAULT_CLOCK)

bool	is_set (uint8_t pin)

void	is_clear (uint8_t pin)

void	set (uint8_t pin)

void	clear (uint8_t pin)

void	toggle (uint8_t pin)

void	set ()

void	clear ()

void	update ()

void	set_clock (Clock rate)

void	set_clock (uint32_t freq)

Static Public Member Functions
static Clock	clock (uint32_t freq)

static Clock	cycle (uint16_t ns)

Static Public Attributes
static const uint8_t	PINS = N * CHARBITS

Protected Attributes
uint8_t	m_port [N]

Driver *	m_next
	List of drivers. More...

Interrupt::Handler *	m_irq
	Interrupt handler. More...

OutputPin	m_cs
	Device chip select pin. More...

Pulse	m_pulse
	Chip select pulse width. More...

uint8_t	m_spcr
	SPI/SPCR hardware control register setting. More...

uint8_t	m_spsr
	SPI/SPSR hardware status register. More...

Detailed Description

template<uint8_t N>
class SRPO< N >

N-Shift Register Parallel Output, 3-Wire SPI device driver. The shift registers (74HC595) may be cascaded for N*8-bit parallel output port (see circuit below). The pins are numbered from the first connect shift register (Q0..Q7) and updwards in the chain (Q8..Q15) and so on.

Circuit

                        74HC595    (VCC)
                      +----U----+    |
(Q1)----------------1-|Q1    VCC|-16-+
(Q2)----------------2-|Q2     Q0|-15------------(Q0)
(Q3)----------------3-|Q3    SER|-14------(MOSI/D11)
(Q4)----------------4-|Q4    /OE|-13-----------(GND)
(Q5)----------------5-|Q5   RCLK|-12--------(EN/D10)------+
(Q6)----------------6-|Q6   SCLK|-11-------(SCK/D13)----+ |
(Q7)----------------7-|Q7    /MR|-10-----------(VCC)    | |
                  +-8-|GND   Q7S|--9------------------+ | |
                  |   +---------+                     | | |
                  |      0.1uF                        | | |
                (GND)-----||-------(VCC)              | | |
                                     |                | | |
                        74HC595      |                | | |
                      +----U----+    |                | | |
(Q9)----------------1-|Q1    VCC|-16-+                | | |
(Q10)---------------2-|Q2     Q0|-15------------(Q8)  | | |
(Q11)---------------3-|Q3    SER|-14------------------+ | |
(Q12)---------------4-|Q4    /OE|-13-----------(GND)    | |
(Q13)---------------5-|Q5   RCLK|-12--------------------(-+
(Q14)---------------6-|Q6   SCLK|-11--------------------+ |
(Q15)---------------7-|Q7    /MR|-10-----------(VCC)    | |
                  +-8-|GND   Q7S|--9------------------+ | |
                  |   +---------+                     | | |
                  |      0.1uF                        | | |
                (GND)-----||-------(VCC)              | | |
                                     |                | | |
                                     V                V V V

Note

The shift registers will clock data for presented on the SPI bus (MOSI/SCK) but will not transfer to output register until the enable pulse is given (i.e. when addressed).

Parameters

[in] N number of shift registers (N * 8 output pins).

Definition at line 74 of file SRPO.hh.

Constructor & Destructor Documentation

template<uint8_t N>

SRPO< N >::SRPO	(	Board::DigitalPin	cs = `Board::D10`,
		SPI::Clock	rate = `SPI::DEFAULT_CLOCK`
	)

inline

Construct N-shift register connected to SPI (MOSI, SCL) and given chip select pin.

Parameters

[in]	cs	chip select pin (Default Board::D10/D3).
[in]	clock	SPI hardware setting (default DIV4_CLOCK).

Definition at line 86 of file SRPO.hh.

Member Function Documentation

template<uint8_t N>

void SRPO< N >::clear ( uint8_t pin )

inline

Clear given pin in shadow register. Call update() to write to shift register.

Parameters

[in] pin pin number.

Definition at line 146 of file SRPO.hh.

template<uint8_t N>

void SRPO< N >::clear ( )

inline

Clear the shadow registers. Call update() to write to shift register.

Definition at line 181 of file SRPO.hh.

static Clock SPI::Driver::clock ( uint32_t freq )

inlinestaticinherited

Calculate SPI clock rate (scale factor) for given frequency.

Parameters

[in] freq device max frequency (in Hz).

Returns: clock rate.

Definition at line 117 of file SPI.hh.

static Clock SPI::Driver::cycle ( uint16_t ns )

inlinestaticinherited

Calculate SPI clock rate (scale factor) for given clock cycle time in nano seconds.

Parameters

[in] ns min device clock cycle time.

Returns: clock rate.

Definition at line 135 of file SPI.hh.

template<uint8_t N>

void SRPO< N >::is_clear ( uint8_t pin )

inline

Return true(1) if the given pin in shadow register is set, otherwise false(0).

Parameters

[in] pin pin number.

Returns: bool.

Definition at line 122 of file SRPO.hh.

template<uint8_t N>

bool SRPO< N >::is_set ( uint8_t pin )

inline

Return true(1) if the given pin in shadow register is set, otherwise false(0).

Parameters

[in] pin pin number.

Returns: bool.

Definition at line 109 of file SRPO.hh.

template<uint8_t N>

void SRPO< N >::set ( uint8_t pin )

inline

Set given pin in shadow register. Call update() to write to shift register.

Parameters

[in] pin pin number.

Definition at line 134 of file SRPO.hh.

template<uint8_t N>

void SRPO< N >::set ( )

inline

Set the shadow registers. Call update() to write to shift register.

Definition at line 171 of file SRPO.hh.

void SPI::Driver::set_clock ( Clock rate )

inherited

Set SPI master clock rate.

Parameters

[in] clock rate.

Definition at line 297 of file SPI.cpp.

void SPI::Driver::set_clock ( uint32_t freq )

inlineinherited

Set SPI master clock frequency.

Parameters

[in] freq device max frequency (in Hz).

Definition at line 157 of file SPI.hh.

template<uint8_t N>

void SRPO< N >::toggle ( uint8_t pin )

inline

Toggle given pin in shadow register. Call update() to write to shift register.

Parameters

[in] pin pin number.

Definition at line 158 of file SRPO.hh.

template<uint8_t N>

void SRPO< N >::update ( )

inline

Update shift register with value of shadow registers.

Definition at line 190 of file SRPO.hh.

Member Data Documentation

OutputPin SPI::Driver::m_cs

protectedinherited

Device chip select pin.

Definition at line 166 of file SPI.hh.

Interrupt::Handler* SPI::Driver::m_irq

protectedinherited

Interrupt handler.

Definition at line 165 of file SPI.hh.

Driver* SPI::Driver::m_next

protectedinherited

List of drivers.

Definition at line 164 of file SPI.hh.

template<uint8_t N>

uint8_t SRPO< N >::m_port[N]

protected

Shadow port register.

Definition at line 254 of file SRPO.hh.

Pulse SPI::Driver::m_pulse

protectedinherited

Chip select pulse width.

Definition at line 167 of file SPI.hh.

uint8_t SPI::Driver::m_spcr

protectedinherited

SPI/SPCR hardware control register setting.

Definition at line 173 of file SPI.hh.

uint8_t SPI::Driver::m_spsr

protectedinherited

SPI/SPSR hardware status register.

Definition at line 174 of file SPI.hh.

template<uint8_t N>

const uint8_t SRPO< N >::PINS = N * CHARBITS

static

Number of pins for N ports

Definition at line 77 of file SRPO.hh.

The documentation for this class was generated from the following file:

libraries/SRPO/SRPO.hh

Classes

Public Member Functions

Static Public Member Functions

Static Public Attributes

Protected Attributes

Detailed Description

template<uint8_t N> class SRPO< N >

Circuit

Note

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation

template<uint8_t N>
class SRPO< N >