CC1101.hh

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#ifndef COSA_CC1101_HH
#define COSA_CC1101_HH

#include "Cosa/SPI.hh"
#include "Cosa/OutputPin.hh"
#include "Cosa/ExternalInterrupt.hh"
#include "Cosa/Wireless.hh"

#if !defined(BOARD_ATTINYX5)

class CC1101 : private SPI::Driver, public Wireless::Driver {
public:
  static const size_t DEVICE_PAYLOAD_MAX = 64;

  static const size_t PAYLOAD_MAX = DEVICE_PAYLOAD_MAX - 4;

#if defined(BOARD_ATTINYX4)
  CC1101(uint16_t net, uint8_t dev,
         Board::DigitalPin csn = Board::D2,
         Board::ExternalInterruptPin irq = Board::EXT0);
#elif defined(BOARD_ATMEGA2560)
  CC1101(uint16_t net, uint8_t dev,
         Board::DigitalPin csn = Board::D53,
         Board::ExternalInterruptPin irq = Board::EXT4);
#else
  CC1101(uint16_t net, uint8_t dev,
         Board::DigitalPin csn = Board::D10,
         Board::ExternalInterruptPin irq = Board::EXT0);
#endif

  virtual bool begin(const void* config = NULL);

  virtual bool end();

  virtual int send(uint8_t dest, uint8_t port, const iovec_t* vec);

  virtual int send(uint8_t dest, uint8_t port, const void* buf, size_t len);

  virtual int recv(uint8_t& src, uint8_t& port, void* buf, size_t len,
                   uint32_t ms = 0L);

  virtual void powerdown();

  virtual void wakeup_on_radio();

  virtual void output_power_level(int8_t dBm);

  virtual int input_power_level();

  virtual int link_quality_indicator()
  {
    return (m_recv_status.lqi);
  }

protected:
  union header_t {
    uint8_t as_uint8;           
    struct {                    
      uint8_t reg:6;            
      uint8_t burst:1;          
      uint8_t rw:1;             
    };

    header_t(uint8_t addr, uint8_t is_burst, uint8_t is_read)
    {
      reg = addr;
      burst = is_burst;
      rw = is_read;
    }

    operator uint8_t()
    {
      return (as_uint8);
    }
  };

  uint8_t read(uint8_t reg)
  {
    m_status = spi.transfer(header_t(reg, 0, 1));
    uint8_t res = spi.transfer(0);
    return (res);
  }

  void read(uint8_t reg, void* buf, size_t count)
  {
    m_status = spi.transfer(header_t(reg, 1, 1));
    spi.read(buf, count);
  }

  void write(uint8_t reg, uint8_t value)
  {
    m_status = spi.transfer(header_t(reg, 0, 0));
    spi.transfer(value);
  }

  void write(uint8_t reg, const void* buf, size_t count)
  {
    m_status = spi.transfer(header_t(reg, 1, 0));
    spi.write(buf, count);
  }

  void write_P(uint8_t reg, const uint8_t* buf, size_t count)
  {
    m_status = spi.transfer(header_t(reg, 1, 0));
    spi.write_P(buf, count);
  }

  enum Config {
    IOCFG2 = 0x00,              
    IOCFG1 = 0x01,              
    IOCFG0 = 0x02,              
    FIFOTH = 0x03,              
    SYNC1  = 0x04,              
    SYNC0  = 0x05,              
    PKTLEN = 0x06,              
    PKTCTR = 0x07,              
    PKTCTRL0 = 0x08,            
    ADDR = 0x09,                
    CHANNR = 0x0A,              
    FSCTRL1 = 0x0B,             
    FSCTRL0 = 0x0C,             
    FREQ2 = 0x0D,               
    FREQ1 = 0x0E,               
    FREQ0 = 0x0F,               
    MDMCFG4 = 0x10,             
    MDMCFG3 = 0x11,             
    MDMCFG2 = 0x12,             
    MDMCFG1 = 0x13,             
    MDMCFG0 = 0x14,             
    DEVIATN = 0x15,             
    MCSM2 = 0x16,               
    MCSM1 = 0x17,               
    MCSM0 = 0x18,               
    FOCCFG = 0x19,              
    BSCFG = 0x1A,               
    AGCCTRL2 = 0x1B,            
    AGCCTRL1 = 0x1C,            
    AGCCTRL0 = 0x1D,            
    WOREVT1 = 0x1E,             
    WOREVT0 = 0x1F,             
    WORCTRL = 0x20,             
    FREND1 = 0x21,              
    FREND0 = 0x22,              
    FSCAL3 = 0x23,              
    FSCAL2 = 0x24,              
    FSCAL1 = 0x25,              
    FSCAL0 = 0x26,              
    RCCTRL1 = 0x27,             
    RCCTRL0 = 0x28,             
    FSTEST = 0x29,              
    PTEST = 0x2A,               
    AGCTEST = 0x2B,             
    TEST2 = 0x2C,               
    TEST1 = 0x2D,               
    TEST0 = 0x2E,               
    CONFIG_MAX = 0x29           
  } __attribute__((packed));

  uint8_t read(Config reg)
  {
    return (read((uint8_t) reg));
  }

  void read(Config reg, void* buf, size_t count)
  {
    read((uint8_t) reg, buf, count);
  }

  void write(Config reg, uint8_t value)
  {
    write((uint8_t) reg, value);
  }

  void write(Config reg, const void* buf, size_t count)
  {
    write((uint8_t) reg, buf, count);
  }

  void write_P(Config reg, const uint8_t* buf, size_t count)
  {
    write_P((uint8_t) reg, buf, count);
  }

  enum Data {
    PATABLE = 0x3E,             
    TXFIFO = 0x3F,              
    RXFIFO = 0x3F,              
  } __attribute__((packed));

  static const size_t PATABLE_MAX = 8;

  uint8_t read(Data reg)
  {
    return (read((uint8_t) reg));
  }

  void read(Data reg, void* buf, size_t count)
  {
    read((uint8_t) reg, buf, count);
  }

  void write(Data reg, uint8_t value)
  {
    write((uint8_t) reg, value);
  }

  void write(Data reg, const void* buf, size_t count)
  {
    write((uint8_t) reg, buf, count);
  }

  void write_P(Data reg, const uint8_t* buf, size_t count)
  {
    write_P((uint8_t) reg, buf, count);
  }

  enum Status {
    PARTNUM = 0x30,             
    VERSION = 0x31,             
    FREQEST = 0x32,             
    LQI = 0x33,                 
    RSSI = 0x34,                
    MARCSTATE = 0x35,           
    WORTIME1 = 0x36,            
    WORTIME0 = 0x37,            
    PKTSTATUS = 0x38,           
    VCO = 0x39,                 
    TXBYTES = 0x3A,             
    RXBYTES = 0x3B,             
    BYTES_MASK = 0x7f,          
    FIFO_MASK = 0x80,           
    RCCTRL1_STATUS = 0x3C,      
    RCCTRL0_STATUS = 0x3D,      
    STATUS_MAX = 0x0E,          
  } __attribute__((packed));

  uint8_t read(Status reg)
  {
    uint8_t res;
    read((uint8_t) reg, &res, sizeof(res));
    return (res);
  }

  enum Command {
    SRES = 0x30,                
    SFSTXON = 0x31,             
    SXOFF = 0x32,               
    SCAL = 0x33,                
    SRX = 0x34,                 
    STX = 0x35,                 
    SIDLE = 0x36,               
    SAFC = 0x37,                
    SWOR = 0x38,                
    SPWD = 0x39,                
    SFRX = 0x3A,                
    SFTX = 0x3B,                
    SWORRST = 0x3C,             
    SNOP = 0x3D                 
  } __attribute__((packed));

  void strobe(Command cmd);

  enum Mode {                   
    IDLE_MODE = 0,              
    RX_MODE,                    
    TX_MODE,                    
    FSTXON_MODE,                
    CALIBRATION_MODE,           
    SETTLING_MODE,              
    RXFIFO_OVERFLOW_MODE,       
    TXFIFO_UNDERFLOW_MODE       
  } __attribute__((packed));

  union status_t {
    uint8_t as_uint8;           
    struct {                    
      uint8_t avail:4;          
      uint8_t mode:3;           
      uint8_t ready:1;          
    };

    status_t(uint8_t value)
    {
      as_uint8 = value;
    }
  };

  status_t status() const
  {
    return (m_status);
  }

  status_t read_status(uint8_t fifo = 1)
  {
    spi.acquire(this);
      spi.begin();
        m_status = spi.transfer(header_t(0,0,fifo));
      spi.end();
    spi.release();
    return (m_status);
  }

  void await(Mode mode);

  enum State {                          
    SLEEP_STATE = 0x00,                 
    IDLE_STATE = 0x01,                  
    XOFF_STATE = 0x02,                  
    VCOON_MC_STATE = 0x03,              
    REGON_MC_STATE = 0x04,              
    MANCAL_STATE = 0x05,                
    VCOON_STATE = 0x06,                 
    REGON_STATE = 0x07,                 
    STARTCAL_STATE = 0x08,              
    BWBOOST_STATE = 0x09,               
    FS_LOCK_STATE = 0x0A,               
    IFADCON_STATE = 0x0B,               
    ENDCAL_STATE = 0x0C,                
    RX_STATE = 0x0D,                    
    RX_END_STATE = 0x0E,                
    RX_RST_STATE = 0x0F,                
    TXRX_SWITCH_STATE = 0x10,           
    RXFIFO_OVERFLOW_STATE = 0x11,       
    FSTXON_STATE = 0x12,                
    TX_STATE = 0x13,                    
    TX_END_STATE = 0x14,                
    RXTX_SWITCH_STATE = 0x15,           
    TXFIFO_UNDERFLOW_STATE = 0x16       
  } __attribute__((packed));

  State read_marc_state()
  {
    return ((State) read(MARCSTATE));
  }

  union recv_status_t {
    uint8_t status[2];          
    struct {                    
      uint8_t rssi;             
      uint8_t lqi:7;            
      uint8_t crc:1;            
    };
  };

  class IRQPin : public ExternalInterrupt {
    friend class CC1101;
  public:
    IRQPin(Board::ExternalInterruptPin pin, InterruptMode mode, CC1101* rf) :
      ExternalInterrupt(pin, mode, true),
      m_rf(rf)
    {}

    virtual void on_interrupt(uint16_t arg = 0);

  private:
    CC1101* m_rf;               
  };

private:
  static const uint8_t config[] __PROGMEM;

  IRQPin m_irq;                 
  status_t m_status;            
  recv_status_t m_recv_status;  
};
#endif
#endif