26 #if !defined(BOARD_ATTINY) 28 #define M_CREG(name) uint16_t(&m_creg->name), SPI_CP_BSB_CR 29 #define M_SREG(name) uint16_t(&m_sreg->name), (SPI_CP_BSB_SR | (m_snum<<5)) 40 const uint8_t* bp = (
const uint8_t*) buf;
46 for (
size_t i = 0; i < len; i++, bp++)
58 uint8_t* bp = (uint8_t*) buf;
65 for (
size_t i = 0; i < len; i++, bp++)
75 for (uint8_t i = 0; i <
SOCK_MAX; i++) {
82 uint8_t BROADCAST[4] = { 0, 0, 0, 0 };
89 timeout =
swap(timeout * 10);
93 memcpy_P(mac,
m_mac,
sizeof(mac));
uint8_t transfer(uint8_t data)
void write(uint16_t addr, uint8_t ctl, uint8_t data)
void addr(uint8_t ip[4], uint8_t subnet[4])
void acquire(Driver *dev)
void addr(uint8_t ip[4], uint8_t subnet[4])
int bind(uint8_t ip[4], uint8_t subnet[4], uint8_t gateway[4]=NULL)
uint8_t transfer_next(uint8_t data)
uint8_t SHAR[6]
Source Hardware Address Register.
bool begin(uint8_t ip[4]=NULL, uint8_t subnet[4]=NULL, uint16_t timeout=500)
static const uint8_t SOCK_MAX
uint8_t read(uint16_t addr, uint8_t ctl)
Operation, variable date mode.
void transfer_start(uint8_t data)
uint16_t RTR
Retry Time Register.