COSA
An Object-Oriented Platform for Arduino Programming
W5500.cpp
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1 
21 #include "W5500.hh"
22 #include <W5X00.h>
23 #include <DNS.h>
24 #include <DHCP.h>
25 
26 #if !defined(BOARD_ATTINY)
27 
28 #define M_CREG(name) uint16_t(&m_creg->name), SPI_CP_BSB_CR
29 #define M_SREG(name) uint16_t(&m_sreg->name), (SPI_CP_BSB_SR | (m_snum<<5))
30 
31 #define W5X00 W5500
32 #include <W5X00.inc>
33 
34 
35 void
36 W5500::write(uint16_t addr, uint8_t ctl, const void* buf, size_t len, bool progmem)
37 {
38  ctl |= (SPI_CP_RWB_WS | SPI_CP_OM_VDM); // Complete Control Byte by setting to write and variable data length mode
39 
40  const uint8_t* bp = (const uint8_t*) buf;
41  spi.acquire(this);
42  spi.begin();
43  spi.transfer_start(addr >> 8);
44  spi.transfer_next(addr);
45  spi.transfer_next(ctl);
46  for (size_t i = 0; i < len; i++, bp++)
47  spi.transfer_next(progmem ? pgm_read_byte(bp) : *bp);
49  spi.end();
50  spi.release();
51 }
52 
53 void
54 W5500::read(uint16_t addr, uint8_t ctl, void* buf, size_t len)
55 {
56  ctl |= (SPI_CP_RWB_RS | SPI_CP_OM_VDM); // Complete Control Byte by setting to write and variable data length mode
57 
58  uint8_t* bp = (uint8_t*) buf;
59  spi.acquire(this);
60  spi.begin();
61  spi.transfer_start(addr >> 8);
62  spi.transfer_next(addr);
63  spi.transfer_next(ctl);
65  for (size_t i = 0; i < len; i++, bp++)
66  *bp = spi.transfer(0);
67  spi.end();
68  spi.release();
69 }
70 
71 bool
72 W5500::begin(uint8_t ip[4], uint8_t subnet[4], uint16_t timeout)
73 {
74  // Initiate socket structure; buffer allocation and socket register pointer
75  for (uint8_t i = 0; i < SOCK_MAX; i++) {
76  m_sock[i].m_proto = 0;
77  m_sock[i].m_snum = i;
78  m_sock[i].m_dev = this;
79  }
80 
81  // Check for default network address
82  uint8_t BROADCAST[4] = { 0, 0, 0, 0 };
83  if (ip == NULL || subnet == NULL) {
84  subnet = BROADCAST;
85  ip = BROADCAST;
86  }
87 
88  // Adjust timeout period to 100 us scale
89  timeout = swap(timeout * 10);
90 
91  // Read hardware address from program memory
92  uint8_t mac[6];
93  memcpy_P(mac, m_mac, sizeof(mac));
94 
95  // Reset and setup registers
96  write(M_CREG(MR), MR_RST);
97  write(M_CREG(SHAR), mac, sizeof(m_creg->SHAR));
98  write(M_CREG(RTR), &timeout, sizeof(m_creg->RTR));
99 
100  // Set source network address, subnet mask and default gateway
101  bind(ip, subnet);
102 
103  // TODO: Attach interrupt handler
104  // spi.attach(this);
105 
106  return (true);
107 }
108 #endif
uint8_t m_snum
Definition: W5500.hh:533
uint8_t transfer(uint8_t data)
Definition: SOFT_SPI.cpp:87
void write(uint16_t addr, uint8_t ctl, uint8_t data)
Definition: W5500.hh:644
void addr(uint8_t ip[4], uint8_t subnet[4])
S/W Reset.
Definition: W5500.hh:165
W5500 * m_dev
Definition: W5500.hh:530
void acquire(Driver *dev)
Definition: SOFT_SPI.cpp:43
#define NULL
Definition: Types.h:101
void addr(uint8_t ip[4], uint8_t subnet[4])
const uint8_t * m_mac
Definition: W5500.hh:633
Driver m_sock[SOCK_MAX]
Definition: W5500.hh:624
CommonRegister * m_creg
Definition: W5500.hh:627
int bind(uint8_t ip[4], uint8_t subnet[4], uint8_t gateway[4]=NULL)
uint8_t transfer_next(uint8_t data)
Definition: SPI.hh:261
uint8_t SHAR[6]
Source Hardware Address Register.
Definition: W5500.hh:140
Write Access Select.
Definition: W5500.hh:338
#define M_CREG(name)
Definition: W5500.cpp:28
bool begin(uint8_t ip[4]=NULL, uint8_t subnet[4]=NULL, uint16_t timeout=500)
Definition: W5500.cpp:72
static const uint8_t SOCK_MAX
Definition: W5500.hh:352
void begin()
Definition: SPI.hh:216
#define swap(a, b)
Definition: Canvas.cpp:164
void end()
Definition: SPI.hh:226
uint8_t m_proto
Definition: Socket.hh:305
uint8_t transfer_await()
Definition: SPI.hh:249
uint8_t read(uint16_t addr, uint8_t ctl)
Operation, variable date mode.
Definition: W5500.hh:339
Read Access Select.
Definition: W5500.hh:337
void transfer_start(uint8_t data)
Definition: SPI.hh:238
SPI spi
Definition: SPI.cpp:29
void release()
Definition: SOFT_SPI.cpp:64
uint16_t RTR
Retry Time Register.
Definition: W5500.hh:147