26 #if !defined(BOARD_ATTINY) 72 void addr(uint8_t ip[4], uint8_t subnet[4]);
89 bool begin_P(
const char* hostname, uint16_t timeout = 500);
92 return (
begin_P((
const char*) hostname, timeout));
104 uint16_t timeout = 500);
114 int bind(uint8_t ip[4], uint8_t subnet[4], uint8_t gateway[4] =
NULL);
170 } __attribute__((packed));
180 } __attribute__((packed));
190 } __attribute__((packed));
204 } __attribute__((packed));
218 } __attribute__((packed));
230 } __attribute__((packed));
248 uint8_t reserved1[7];
277 } __attribute__((packed));
292 } __attribute__((packed));
303 } __attribute__((packed));
325 } __attribute__((packed));
343 } __attribute__((packed));
373 virtual int available();
395 virtual int read(
void* buf,
size_t size);
414 virtual int open(
Protocol proto, uint16_t port, uint8_t flag);
434 virtual int listen();
445 virtual int accept();
456 virtual int connect(uint8_t addr[4], uint16_t port);
466 virtual int connect(
const char* hostname, uint16_t port);
475 virtual int is_connected();
483 virtual int disconnect();
494 virtual int datagram(uint8_t addr[4], uint16_t port);
507 virtual int recv(
void* buf,
size_t len);
522 virtual int recv(
void* buf,
size_t len,
523 uint8_t src[4], uint16_t& port);
549 int dev_read(
void* buf,
size_t len);
560 int dev_write(
const void* buf,
size_t len,
bool progmem);
584 virtual int write(
const void* buf,
size_t size,
bool progmem);
598 virtual int send(
const void* buf,
size_t len,
bool progmem);
614 virtual int send(
const void* buf,
size_t len,
615 uint8_t dest[4], uint16_t port,
620 static const uint8_t
MAC[6] PROGMEM;
644 void write(uint16_t addr, uint8_t ctl, uint8_t data)
646 write(addr, ctl, &data, 1);
657 void write(uint16_t addr, uint8_t ctl,
const void* buf,
size_t len,
bool progmem =
false);
667 void write_P(uint16_t addr, uint8_t ctl,
const void* buf,
size_t len)
669 write(addr, ctl, buf, len,
true);
677 uint8_t
read(uint16_t addr, uint8_t ctl);
687 void read(uint16_t addr, uint8_t ctl,
void* buf,
size_t len);
696 void issue(uint16_t addr, uint8_t ctl, uint8_t cmd);
Occurrence of Socket 6 Interrupt.
Occurrence of Socket 1 Interrupt.
Mask occurrence of Socket 2 Interrupt.
static const uint8_t MAC[6]
TCP: Initiate client mode.
void write(uint16_t addr, uint8_t ctl, uint8_t data)
TCP: Initiate server mode.
Operation, fixed data 2 byte mode.
uint16_t RX_RD
RX Read Pointer Register.
uint8_t SR
Status Register.
uint8_t IR
Interrupt Register.
void addr(uint8_t ip[4], uint8_t subnet[4])
void write_P(uint16_t addr, uint8_t ctl, const void *buf, size_t len)
uint8_t KPALVTR
Keep alive timer.
virtual int write(const void *buf, size_t size)
Multicast(UDP) MAC Filter(MACRAW).
virtual int read(void *buf, size_t size)
static const size_t MSG_MAX
Mask occurrence of Socket 0 Interrupt.
static const uint8_t DNS_RETRY_MAX
uint8_t TXMEM_SIZE
TX Memory Size Register.
Occurrence of Socket 5 Interrupt.
uint8_t GAR[4]
Gateway Address Register.
uint8_t IMR
Interrupt Mask Register.
Mask occurrence of Socket 5 Interrupt.
uint8_t PHYCFGR
PHY COnfiguration.
Mask occurrence of Socket 4 Interrupt.
Occurrence of Socket 2 Interrupt.
void issue(uint16_t addr, uint8_t ctl, uint8_t cmd)
static const size_t BUF_MAX
uint8_t SUBR[4]
Subnet mask Address Register.
Send operation is completed.
Occurrence of Socket 3 Interrupt.
int bind(uint8_t ip[4], uint8_t subnet[4], uint8_t gateway[4]=NULL)
TCP: Disconnect server/client.
uint16_t UPORTR
Unreachable Port Register.
Occurrence of Socket 4 Interrupt.
uint8_t UIPR[4]
Unreachable IP Address Register.
Socket * socket(Socket::Protocol proto, uint16_t port=0, uint8_t flag=0)
TCP: Check connection status.
Initiate socket according to MR.
uint8_t SHAR[6]
Source Hardware Address Register.
uint8_t RCR
Retry Count Register.
uint8_t reserved[10]
Reserved.
Operation, fixed data 3 byte mode.
uint16_t FRAG
Fragment Register.
uint16_t RX_WR
RX Write Pointer Register.
uint8_t PMAGIC
PPP LCP Magic number.
const class prog_str * str_P
uint8_t PHAR[6]
PPP Destination MAC Address.
uint8_t PTIMER
PPP LCP Request Timer Register.
uint8_t RXMEM_SIZE
RX Memory Size Register.
Mask occurrence of Socket 7 Interrupt.
uint8_t IMR
Interrupt Mask Register.
uint8_t VERSIONR
Chip Version.
uint8_t CR
Command Register.
void dns_addr(uint8_t ip[4])
bool begin(uint8_t ip[4]=NULL, uint8_t subnet[4]=NULL, uint16_t timeout=500)
static const uint8_t SOCK_MAX
Occurrence of Socket 0 Interrupt.
uint8_t SIMR
Socket Interrupt Mask Register.
IOStream & flush(IOStream &outs)
Mask occurrence of Socket 3 Interrupt.
Receiving packet to RX_RD.
bool begin_P(str_P hostname, uint16_t timeout=500)
uint8_t SIR
Socket Interrupt Register.
uint16_t PSID
PPP Session Identification.
uint16_t DPORT
Destination Port Register.
W5500(const uint8_t *mac=NULL, Board::DigitalPin csn=Board::D10)
Occurrence of Socket 7 Interrupt.
uint16_t TX_FSR
TX Free Size Register.
uint16_t PORT
Source Port Register.
Operation, fixed data 1 byte mode.
uint8_t read(uint16_t addr, uint8_t ctl)
Operation, variable date mode.
uint16_t PMRU
PPP Maximum Segment Size.
uint16_t MSSR
Maximum Segment Size Register.
No Delayed ACK(TCP) Multicast IGMP version(UDP) Multicast Block(MACRAW).
Transmit data according to TX_WR.
uint16_t INTLEVEL
Interrupt Low level Timer.
uint16_t RX_RSR
RX Received Size Register.
uint8_t SIPR[4]
Source IP Address Register.
Mask occurrence of Socket 6 Interrupt.
uint8_t PROTO
Protocol in IP Raw mode. See W5500 Application Note doc.
uint8_t IR
Interrupt Register.
Unicast Block(UDP) IPv6 Block(MACRAW)
uint16_t TX_WR
TX Write Pointer Register.
bool begin_P(const char *hostname, uint16_t timeout=500)
Mask occurrence of Socket 1 Interrupt.
uint16_t RTR
Retry Time Register.
RAW IP. See W5500 Application Note doc.
uint16_t TX_RD
TX Read Pointer Register.
Broadcast Block(UDP & MACRAW)