COSA
An Object-Oriented Platform for Arduino Programming
W5500.hh
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1 
21 #ifndef COSA_W5500_HH
22 #define COSA_W5500_HH
23 
24 #include "Cosa/Types.h"
25 
26 #if !defined(BOARD_ATTINY)
27 #include "Cosa/SPI.hh"
28 #include "Cosa/Socket.hh"
29 
57 class W5500 : private SPI::Driver {
58 public:
65  W5500(const uint8_t* mac = NULL, Board::DigitalPin csn = Board::D10);
66 
72  void addr(uint8_t ip[4], uint8_t subnet[4]);
73 
79  void dns_addr(uint8_t ip[4]) { memcpy(ip, m_dns, sizeof(m_dns)); }
80 
89  bool begin_P(const char* hostname, uint16_t timeout = 500);
90  bool begin_P(str_P hostname, uint16_t timeout = 500)
91  {
92  return (begin_P((const char*) hostname, timeout));
93  }
94 
103  bool begin(uint8_t ip[4] = NULL, uint8_t subnet[4] = NULL,
104  uint16_t timeout = 500);
105 
114  int bind(uint8_t ip[4], uint8_t subnet[4], uint8_t gateway[4] = NULL);
115 
124  Socket* socket(Socket::Protocol proto, uint16_t port = 0, uint8_t flag = 0);
125 
130  bool end();
131 
132 protected:
136  struct CommonRegister {
137  uint8_t MR;
138  uint8_t GAR[4];
139  uint8_t SUBR[4];
140  uint8_t SHAR[6];
141  uint8_t SIPR[4];
142  uint16_t INTLEVEL;
143  uint8_t IR;
144  uint8_t IMR;
145  uint8_t SIR;
146  uint8_t SIMR;
147  uint16_t RTR;
148  uint8_t RCR;
149  uint8_t PTIMER;
150  uint8_t PMAGIC;
151  uint8_t PHAR[6];
152  uint16_t PSID;
153  uint16_t PMRU;
154  uint8_t UIPR[4];
155  uint16_t UPORTR;
156  uint8_t PHYCFGR;
157  uint8_t reserved[10];
158  uint8_t VERSIONR;
159  };
160 
164  enum {
165  MR_RST = 0x80,
166  MR_WOL = 0x20,
167  MR_PB = 0x10,
168  MR_PPPoE = 0x08,
169  MR_FARP = 0x02
170  } __attribute__((packed));
171 
175  enum {
176  IR_CONFLICT = 0x80,
177  IR_UNREACH = 0x40,
178  IR_PPPoE = 0x20,
179  IR_MP = 0x10
180  } __attribute__((packed));
181 
182  /*
183  * Interrupt Mask Register bitfields, pp. 37.
184  */
185  enum {
186  IMR_CONFLICT = 0x80, //<! IP Conflict.
187  IMR_UNREACH = 0x40,
188  IMR_PPPoE = 0x20,
189  IMR_MP = 0x10
190  } __attribute__((packed));
191 
195  enum {
196  SIR_S7_INT = 0x80,
197  SIR_S6_INT = 0x40,
198  SIR_S5_INT = 0x20,
199  SIR_S4_INT = 0x10,
200  SIR_S3_INT = 0x08,
201  SIR_S2_INT = 0x04,
202  SIR_S1_INT = 0x02,
203  SIR_S0_INT = 0x01
204  } __attribute__((packed));
205 
209  enum {
210  SIMR_S7_INT = 0x80,
211  SIMR_S6_INT = 0x40,
212  SIMR_S5_INT = 0x20,
213  SIMR_S4_INT = 0x10,
214  SIMR_S3_INT = 0x08,
215  SIMR_S2_INT = 0x04,
216  SIMR_S1_INT = 0x02,
217  SIMR_S0_INT = 0x01
218  } __attribute__((packed));
219 
223  enum {
224  MEM_SIZE_00K = 0x00,
225  MEM_SIZE_01K = 0x01,
226  MEM_SIZE_02K = 0x02,
227  MEM_SIZE_04K = 0x04,
228  MEM_SIZE_08K = 0x08,
229  MEM_SIZE_16K = 0x10,
230  } __attribute__((packed));
231 
235  struct SocketRegister {
236  uint8_t MR;
237  uint8_t CR;
238  uint8_t IR;
239  uint8_t SR;
240  uint16_t PORT;
241  uint8_t DHAR[6];
242  uint8_t DIPR[4];
243  uint16_t DPORT;
244  uint16_t MSSR;
245  uint8_t PROTO;
246  uint8_t TOS;
247  uint8_t TTL;
248  uint8_t reserved1[7];
249  uint8_t RXMEM_SIZE;
250  uint8_t TXMEM_SIZE;
251  uint16_t TX_FSR;
252  uint16_t TX_RD;
253  uint16_t TX_WR;
254  uint16_t RX_RSR;
255  uint16_t RX_RD;
256  uint16_t RX_WR;
257  uint8_t IMR;
258  uint16_t FRAG;
259  uint8_t KPALVTR;
260  };
261 
265  enum {
266  MR_FLAG_MASK = 0xe0,
267  MR_MULTIMF = 0x80,
268  MR_BCASTB = 0x40,
269  MR_NDMCMMB = 0x20,
270  MR_UCASTB = 0x10,
271  MR_PROTO_MASK = 0x0f,
273  MR_PROTO_TCP = 0x01,
274  MR_PROTO_UDP = 0x02,
275  MR_PROTO_IPRAW = 0x03,
277  } __attribute__((packed));
278 
282  enum {
283  CR_OPEN = 0x01,
284  CR_LISTEN = 0x02,
285  CR_CONNECT = 0x04,
286  CR_DISCON = 0x08,
287  CR_CLOSE = 0x10,
288  CR_SEND = 0x20,
289  CR_SEND_MAC = 0x21,
290  CR_SEND_KEEP = 0x22,
291  CR_RECV = 0x40
292  } __attribute__((packed));
293 
297  enum {
298  IR_SEND_OK = 0x10,
299  IR_TIMEOUT = 0x08,
300  IR_RECV = 0x04,
301  IR_DISCON = 0x02,
302  IR_CON = 0x01
303  } __attribute__((packed));
304 
308  enum {
309  SR_CLOSED = 0x00,
310  SR_ARP = 0x01,
311  SR_INIT = 0x13,
312  SR_LISTEN = 0x14,
313  SR_SYNSENT = 0x15,
314  SR_SYNRECV = 0x16,
316  SR_FIN_WAIT = 0x18,
317  SR_CLOSING = 0x1A,
318  SR_TIME_WAIT = 0x1B,
320  SR_LAST_ACK = 0x1D,
321  SR_UDP = 0x22,
322  SR_IPRAW = 0x32,
323  SR_MACRAW = 0x42,
324  SR_PPPoE = 0x5F
325  } __attribute__((packed));
326 
332  enum {
333  SPI_CP_BSB_CR = 0x00,
334  SPI_CP_BSB_SR = 0x08,
335  SPI_CP_BSB_TX = 0x10,
336  SPI_CP_BSB_RX = 0x18,
337  SPI_CP_RWB_RS = 0x00,
338  SPI_CP_RWB_WS = 0x04,
339  SPI_CP_OM_VDM = 0x00,
340  SPI_CP_OM_FD1 = 0x01,
341  SPI_CP_OM_FD2 = 0x02,
342  SPI_CP_OM_FD4 = 0x03,
343  } __attribute__((packed));
344 
346  static const size_t BUF_MAX = 2048; // this is initial, max is really 16KB
347 
349  static const size_t MSG_MAX = BUF_MAX / 2;
350 
352  static const uint8_t SOCK_MAX = 8;
353 
355  static const uint8_t DNS_RETRY_MAX = 4;
356 
357 public:
362  class Driver : public Socket {
363  friend class W5500;
364  public:
366  Driver() : Socket() {}
367 
373  virtual int available();
374 
380  virtual int room();
381 
384 
387 
395  virtual int read(void* buf, size_t size);
396 
402  virtual int flush();
403 
414  virtual int open(Protocol proto, uint16_t port, uint8_t flag);
415 
425  virtual int close();
426 
434  virtual int listen();
435 
445  virtual int accept();
446 
456  virtual int connect(uint8_t addr[4], uint16_t port);
457 
466  virtual int connect(const char* hostname, uint16_t port);
467 
475  virtual int is_connected();
476 
483  virtual int disconnect();
484 
494  virtual int datagram(uint8_t addr[4], uint16_t port);
495 
507  virtual int recv(void* buf, size_t len);
508 
522  virtual int recv(void* buf, size_t len,
523  uint8_t src[4], uint16_t& port);
524 
525  protected:
528 
531 
533  uint8_t m_snum;
534 
536  uint16_t m_tx_offset;
537 
539  uint16_t m_tx_len;
540 
549  int dev_read(void* buf, size_t len);
550 
560  int dev_write(const void* buf, size_t len, bool progmem);
561 
565  void dev_flush();
566 
572  void dev_setup();
573 
584  virtual int write(const void* buf, size_t size, bool progmem);
585 
598  virtual int send(const void* buf, size_t len, bool progmem);
599 
614  virtual int send(const void* buf, size_t len,
615  uint8_t dest[4], uint16_t port,
616  bool progmem);
617  };
618 
620  static const uint8_t MAC[6] PROGMEM;
621 
622 protected:
625 
628 
630  uint16_t m_local;
631 
633  const uint8_t* m_mac;
634 
636  uint8_t m_dns[4];
637 
644  void write(uint16_t addr, uint8_t ctl, uint8_t data)
645  {
646  write(addr, ctl, &data, 1);
647  }
648 
657  void write(uint16_t addr, uint8_t ctl, const void* buf, size_t len, bool progmem = false);
658 
667  void write_P(uint16_t addr, uint8_t ctl, const void* buf, size_t len)
668  {
669  write(addr, ctl, buf, len, true);
670  }
671 
677  uint8_t read(uint16_t addr, uint8_t ctl);
678 
687  void read(uint16_t addr, uint8_t ctl, void* buf, size_t len);
688 
696  void issue(uint16_t addr, uint8_t ctl, uint8_t cmd);
697 };
698 
699 #endif
700 #endif
uint8_t m_snum
Definition: W5500.hh:533
Occurrence of Socket 6 Interrupt.
Definition: W5500.hh:197
Definition: Socket.hh:31
Flag mask.
Definition: W5500.hh:266
Occurrence of Socket 1 Interrupt.
Definition: W5500.hh:202
Mask occurrence of Socket 2 Interrupt.
Definition: W5500.hh:215
static const uint8_t MAC[6]
Definition: W5500.hh:620
Magic Packet.
Definition: W5500.hh:189
TCP: Initiate client mode.
Definition: W5500.hh:285
Destination Unreachable.
Definition: W5500.hh:187
Timeout occured.
Definition: W5500.hh:299
PPPoE Connection Close.
Definition: W5500.hh:178
void write(uint16_t addr, uint8_t ctl, uint8_t data)
Definition: W5500.hh:644
Wake on LAN.
Definition: W5500.hh:166
TCP: Initiate server mode.
Definition: W5500.hh:284
Operation, fixed data 2 byte mode.
Definition: W5500.hh:341
uint16_t RX_RD
RX Read Pointer Register.
Definition: W5500.hh:255
uint8_t SR
Status Register.
Definition: W5500.hh:239
uint8_t IR
Interrupt Register.
Definition: W5500.hh:238
void addr(uint8_t ip[4], uint8_t subnet[4])
void write_P(uint16_t addr, uint8_t ctl, const void *buf, size_t len)
Definition: W5500.hh:667
UDP: Transmit data.
Definition: W5500.hh:289
uint8_t KPALVTR
Keep alive timer.
Definition: W5500.hh:259
S/W Reset.
Definition: W5500.hh:165
virtual int write(const void *buf, size_t size)
W5500 * m_dev
Definition: W5500.hh:530
Multicast(UDP) MAC Filter(MACRAW).
Definition: W5500.hh:267
Socket RX Buffer.
Definition: W5500.hh:336
virtual int read(void *buf, size_t size)
static const size_t MSG_MAX
Definition: W5500.hh:349
Mask occurrence of Socket 0 Interrupt.
Definition: W5500.hh:217
static const uint8_t DNS_RETRY_MAX
Definition: W5500.hh:355
#define NULL
Definition: Types.h:101
Definition: W5500.hh:57
Protocol mask.
Definition: W5500.hh:271
uint8_t TXMEM_SIZE
TX Memory Size Register.
Definition: W5500.hh:250
Occurrence of Socket 5 Interrupt.
Definition: W5500.hh:198
PPPoE Mode.
Definition: W5500.hh:168
uint8_t GAR[4]
Gateway Address Register.
Definition: W5500.hh:138
Protocol
Definition: Socket.hh:37
bool end()
uint8_t IMR
Interrupt Mask Register.
Definition: W5500.hh:257
Mask occurrence of Socket 5 Interrupt.
Definition: W5500.hh:212
uint8_t PHYCFGR
PHY COnfiguration.
Definition: W5500.hh:156
Mask occurrence of Socket 4 Interrupt.
Definition: W5500.hh:213
Occurrence of Socket 2 Interrupt.
Definition: W5500.hh:201
const uint8_t * m_mac
Definition: W5500.hh:633
Driver m_sock[SOCK_MAX]
Definition: W5500.hh:624
void issue(uint16_t addr, uint8_t ctl, uint8_t cmd)
static const size_t BUF_MAX
Definition: W5500.hh:346
Undocumented ????
Definition: W5500.hh:310
uint8_t SUBR[4]
Subnet mask Address Register.
Definition: W5500.hh:139
CommonRegister * m_creg
Definition: W5500.hh:627
Send operation is completed.
Definition: W5500.hh:298
Occurrence of Socket 3 Interrupt.
Definition: W5500.hh:200
int bind(uint8_t ip[4], uint8_t subnet[4], uint8_t gateway[4]=NULL)
SocketRegister * m_sreg
Definition: W5500.hh:527
TCP: Disconnect server/client.
Definition: W5500.hh:286
uint16_t UPORTR
Unreachable Port Register.
Definition: W5500.hh:155
Occurrence of Socket 4 Interrupt.
Definition: W5500.hh:199
uint8_t UIPR[4]
Unreachable IP Address Register.
Definition: W5500.hh:154
Socket * socket(Socket::Protocol proto, uint16_t port=0, uint8_t flag=0)
TCP: Check connection status.
Definition: W5500.hh:290
Initiate socket according to MR.
Definition: W5500.hh:283
uint8_t SHAR[6]
Source Hardware Address Register.
Definition: W5500.hh:140
Write Access Select.
Definition: W5500.hh:338
uint8_t RCR
Retry Count Register.
Definition: W5500.hh:148
uint8_t reserved[10]
Reserved.
Definition: W5500.hh:157
Operation, fixed data 3 byte mode.
Definition: W5500.hh:342
PPPoE Connection Close.
Definition: W5500.hh:188
uint16_t FRAG
Fragment Register.
Definition: W5500.hh:258
uint16_t RX_WR
RX Write Pointer Register.
Definition: W5500.hh:256
uint8_t PMAGIC
PPP LCP Magic number.
Definition: W5500.hh:150
const class prog_str * str_P
Definition: Types.h:187
uint8_t PHAR[6]
PPP Destination MAC Address.
Definition: W5500.hh:151
uint8_t PTIMER
PPP LCP Request Timer Register.
Definition: W5500.hh:149
uint8_t RXMEM_SIZE
RX Memory Size Register.
Definition: W5500.hh:249
Mask occurrence of Socket 7 Interrupt.
Definition: W5500.hh:210
uint8_t IMR
Interrupt Mask Register.
Definition: W5500.hh:144
uint8_t VERSIONR
Chip Version.
Definition: W5500.hh:158
uint8_t CR
Command Register.
Definition: W5500.hh:237
Force ARP.
Definition: W5500.hh:169
void dns_addr(uint8_t ip[4])
Definition: W5500.hh:79
bool begin(uint8_t ip[4]=NULL, uint8_t subnet[4]=NULL, uint16_t timeout=500)
Definition: W5500.cpp:72
static const uint8_t SOCK_MAX
Definition: W5500.hh:352
Occurrence of Socket 0 Interrupt.
Definition: W5500.hh:203
uint16_t m_tx_offset
Definition: W5500.hh:536
uint8_t SIMR
Socket Interrupt Mask Register.
Definition: W5500.hh:146
IOStream & flush(IOStream &outs)
Definition: IOStream.hh:853
Mask occurrence of Socket 3 Interrupt.
Definition: W5500.hh:214
uint16_t m_local
Definition: W5500.hh:630
Receiving packet to RX_RD.
Definition: W5500.hh:291
bool begin_P(str_P hostname, uint16_t timeout=500)
Definition: W5500.hh:90
uint8_t SIR
Socket Interrupt Register.
Definition: W5500.hh:145
uint16_t PSID
PPP Session Identification.
Definition: W5500.hh:152
uint16_t DPORT
Destination Port Register.
Definition: W5500.hh:243
W5500(const uint8_t *mac=NULL, Board::DigitalPin csn=Board::D10)
Occurrence of Socket 7 Interrupt.
Definition: W5500.hh:196
uint16_t TX_FSR
TX Free Size Register.
Definition: W5500.hh:251
Destination Unreachable.
Definition: W5500.hh:177
uint16_t PORT
Source Port Register.
Definition: W5500.hh:240
Operation, fixed data 1 byte mode.
Definition: W5500.hh:340
uint8_t read(uint16_t addr, uint8_t ctl)
Operation, variable date mode.
Definition: W5500.hh:339
uint8_t MR
Mode Register.
Definition: W5500.hh:236
Read Access Select.
Definition: W5500.hh:337
uint8_t MR
Mode Register.
Definition: W5500.hh:137
uint16_t PMRU
PPP Maximum Segment Size.
Definition: W5500.hh:153
Close socket.
Definition: W5500.hh:287
Magic Packet.
Definition: W5500.hh:179
uint16_t MSSR
Maximum Segment Size Register.
Definition: W5500.hh:244
IP Conflict.
Definition: W5500.hh:176
Control Register.
Definition: W5500.hh:333
No Delayed ACK(TCP) Multicast IGMP version(UDP) Multicast Block(MACRAW).
Definition: W5500.hh:269
Transmit data according to TX_WR.
Definition: W5500.hh:288
uint16_t INTLEVEL
Interrupt Low level Timer.
Definition: W5500.hh:142
Connection established.
Definition: W5500.hh:302
Socket TX Buffer.
Definition: W5500.hh:335
uint16_t RX_RSR
RX Received Size Register.
Definition: W5500.hh:254
uint8_t SIPR[4]
Source IP Address Register.
Definition: W5500.hh:141
Mask occurrence of Socket 6 Interrupt.
Definition: W5500.hh:211
uint8_t PROTO
Protocol in IP Raw mode. See W5500 Application Note doc.
Definition: W5500.hh:245
uint16_t m_tx_len
Definition: W5500.hh:539
uint8_t IR
Interrupt Register.
Definition: W5500.hh:143
Unicast Block(UDP) IPv6 Block(MACRAW)
Definition: W5500.hh:270
uint8_t TTL
IP TTL.
Definition: W5500.hh:247
uint16_t TX_WR
TX Write Pointer Register.
Definition: W5500.hh:253
bool begin_P(const char *hostname, uint16_t timeout=500)
Mask occurrence of Socket 1 Interrupt.
Definition: W5500.hh:216
Ping Block Mode.
Definition: W5500.hh:167
uint16_t RTR
Retry Time Register.
Definition: W5500.hh:147
RAW IP. See W5500 Application Note doc.
Definition: W5500.hh:275
Received data.
Definition: W5500.hh:300
Connection termination.
Definition: W5500.hh:301
uint8_t TOS
IP TOS.
Definition: W5500.hh:246
uint8_t m_dns[4]
Definition: W5500.hh:636
uint16_t TX_RD
TX Read Pointer Register.
Definition: W5500.hh:252
Socket Register.
Definition: W5500.hh:334
Undocumented ????
Definition: W5500.hh:324
Broadcast Block(UDP & MACRAW)
Definition: W5500.hh:268